1. Filed of the Invention
The present invention relates to a semiconductor device having a base on which a semiconductor chip is mounted.
2. Related Art
In a conventional semiconductor device as disclosed in Japanese Laid-Open Pat. No. H10-22428, a base to which a semiconductor chip is joined, is flat. With the repetitions of turn-on and -off of power in this device during use thereof, the temperature rise is repeated in a part of the base in which the semiconductor chip is joined and, accordingly, a solder layer underneath the semiconductor chip will crack due to fatigue, resulting in a problem of damage to the device. Thus, there is a need to solve the above-mentioned problem.
The present invention is devised in order to solve the above-mentioned problem inherent to the above-mentioned prior art device and, accordingly, one object of the present invention is to provide a semiconductor device which can reduce strain caused in a solder layer joined to a semiconductor chip so as to be prevented from incurring a fatigue failure.
To that end, according to the present invention, there is provided a semiconductor device comprising a base, and a semiconductor chip mounted on the base, wherein a recess is formed in the base in a part underneath the semiconductor chip.
The present invention will be detailed in the form of a preferred embodiment with reference to the accompanying drawings in which: